In general, when a semiconductor integrated circuit is manufactured, various heating processes, such as film forming, etching, annealing, modifying and crystallizing process, are repeatedly performed with respect to the subject to be processed, such as the semiconductor wafer, to form a desired integrated circuit. For instance, in the case of a single type film forming apparatus, which forms a film on semiconductor wafers one by one, a placing table equipped with a resistance heater is installed in an evacuable processing container and a semiconductor wafer is loaded on a top surface of the placing table. In this state, a film forming gas is injected into a processing space so that a thin film is formed on the semiconductor wafer under a predetermined process condition.
Such a thin film can be formed through the thermal decomposition of raw material gas. For instance, the thin film can be formed through a CVD (chemical vapor deposition) process disclosed in, for example, Japanese Unexamined Patent Publication Nos. 2001-023966 and 2003-007694.
When the thin film is formed through the above process, the thin film is of course formed on a top surface of the semiconductor wafer. However, since the film forming gas may be introduced into a gap between a back surface of the wafer and the placing table by way of a peripheral portion and a lateral side of the wafer, the thin film may also be formed from the peripheral portion to the entire lateral side of the wafer. In other words, the thin film may be formed on a bevel portion of the wafer to a certain degree as well as a back surface of the peripheral portion of the wafer.
The thin film unnecessarily deposited on the bevel portion or the back surface of the wafer may be delaminated in the subsequent processes, so the particles are generated or contamination may occur caused by the thin film unnecessarily deposited on the bevel portion or the back surface of the wafer.
In particular, the critical dimensions of the semiconductor device have recently become finer, so the process conditions tend to be set with high step coverage to ensure the embeddability for various holes or recesses formed in the surface of the wafer. That is, the film forming gas may tend to flow through the bevel portion or the back surface of the wafer, thereby causing the above problems.
In order to solve the above problems, there is provided a method for preventing the formation of undesired thin films by introducing a purge gas such an inert gas to the peripheral portion of the wafer. However, if the purge gas which is not related to the thin film formation is introduced into the processing space, the thin film may not be formed on a local area of the wafer due to the purge gas, so that thickness uniformity of the thin film may be degraded.
In particular, a precious metal thin film is recently formed by using metal carbonyl gas as raw material gas to reduce the contact resistance. When the precious metal thin film is formed, the process condition tends to be set with the high step coverage, so it is necessary to solve the above problems to provide the precious metal thin film having high quality.